CS 208 w20 lecture 16 outline

1 Program's View of Memory

memhier-program.png

2 CPU-Memory Bottleneck

  • processor speed has increased at a much faster rate than memory speed, creating an increasing bottleneck

mem-bottleneck.png

3 Caches!

memhier.png

  • 0 cycles to access a register (16×8 bytes)
  • 4–75 cycles to access a cache (~10 MB)
  • 100s to access main memory (GBs)
  • 10s of millions to access disk (TBs)

3.1 Aside: SRAM vs DRAM

3.1.1 Static RAM (SRAM)

  • bistable memory cell, 6 transitors per bit
    • stable in two states, any other state quickly moves into a stable one
    • resiliant to disturbance

3.1.2 Dynamic RAM (DRAM)

  • single transitor and capacitor per cell, can be very dense
  • sensitive to disturbance
  • drains on a timescale of 10 to 100 ms, must be refreshed (read and re-written)
    • error-correcting codes (extra bits associated with each word) can also be used

3.2 Basic Idea

cacheconcept.png

3.2.1 Cache Hit

cachehit.png

3.2.2 Cache Miss

cachemiss.png

4 Locality

  • essentially: referencing data that was recently referenced or that is nearby recently referenced data
  • temporal locality: a referenced memory location is likely to be referenced again in the near future
  • spatial locality: if a memory location is referenced, nearby locations are likely to be referenced in the near future
  • in general, programs with good locality run faster, as all levels of the system are designed to exploit locality
    • hardware cache memories, OS caching recently referenced chunks of virtual address space and disk blocks, web browsers caching recent documents