CS 332 w22 — Paging: Smaller Tables
Table of Contents
1 Multi-level Translation
Problem: a single page table with an entry for each virtual page in the address space would use way too much memory.
Solution: multiple page table arranged in a hierarchy!
- Tree of translation tables
- Paged segmentation
- Multi-level page tables
- Multi-level paged segmentation
- Fixed-size page as lowest level unit of allocation
- Benefits
- Efficient memory allocation (compared to segments)
- Efficient for sparse addresses (compared to paging)
- Easier to build translation lookaside buffers (Friday's class)
- Variable granularity for protection/sharing
1.1 Paged Segmentation
- Process memory is segmented
- Segment table entry:
- Pointer to page table
- Page table length (# of pages in segment)
- Access permissions
- Page table entry:
- Page frame
- Access permissions
- Share/protection at either page or segment-level
- Coarse-grained/fine-grained sharing
- Reduces the size of page tables by limited them to just the valid segment regions
1.2 Multi-level Paging
- Multiple levels of page tables
- Entries in the lowest table refer to physical pages
- Entries in the higher tables refer to lower page tables
- Only entries in the top-level table need to be filled in
- Lower levels only allocated if those parts of the addresses space are used
- Access permissions at each level facilitate fine-grained sharing
With a 32-bit virtual address space and 4 KB pages, a 1-level page table would have \(2^{20}\) PTEs (4 KB page means a 12-bit offset, leaving 20 bits for the virtual page number, meaning \(2^{20}\) virtual pages and a PTE for each one). With 4 GB of physical memory, we'd have \(2^{20}\) physical pages, and thus each PTE would have 20 bits for the physical page number, a valid bit, 3 permission bits, and possibly more. So at least 3 bytes per PTE means we need at least 3 MB for the page table. And that's per-process!
If the process is only using 8 MB of virtual memory (\(2^{11}\) pages), this is a big waste and an outrageous overhead. Moving to 2 levels of page tables (or a page directory and a page table, as the reading calls them) means we split our $220 PTEs into two parts. The level 1 table (page directory) has \(2^{10}\) entries, each of which corresponds to a range of \(2^{10}\) virtual pages. If (and only if) the level 1 table has a non-null entry will we have a level 2 page table with an entry for each of the \(2^{10}\) virtual pages.
If our 8 MB of virtual memory is spread across 4 2MB-regions (\(2^9\) contiguous pages each), then we will have \(2^{10}\) entries in the level 1 table, and 4 level 2 tables each with \(2^{10}\) entries. So our overhead has come down from 3 MB to 15 KB—pretty good!
1.3 Pros and Cons
- Pros:
- Allocate/fill only page table entries that are in use
- Simple memory allocation
- Share at the segment or page level
- Cons:
- Space overhead: one pointer per virtual page
- But multi-level tables have made it manageable
- Two (or more) lookups per memory reference—way too slow!
2 Lab 4 Guidance
- in
osv
, amemregion
is the same idea as the segments we have been talking about- has a
start
and anend
that define the range of virtual addresses in the region - regions are not used as part of address translation
- has a
osv
uses multi-level page tables for address translation- this process is already implemented in its entirety (otherwise accessing memory just wouldn't work)
- the main way you will interact with it is to use
vpmap_map
to add an entry to a page table vpmap
isosv
's name for a page table
- each process struct has an address space (
struct addrspace
) inside it- each
struct addrspace
has- a page table (
struct vpmap *vpmap
) - a list of memory regions (
List regions
)- you can use
as_find_memregion
to determine what region, if any, a particular address is in
- you can use
- a pointer to the heap region (so
sys_sbrk
can easily know which region to modify)
- a page table (
- each
3 Reading: Paging: Smaller Tables
Read OSTEP chapter 20 about strategies to make page tables smaller. It provides a more thorough introduction to multi-level paging with some good examples.